mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 414

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

Serial Communication Interface (SCI)Serial Communications Interface (SCIV4)
18.2.3
This register can be read or written at any time.
18-6
Reset
Field
Field
TCIE
ILIE
TIE
RIE
PE
PT
1
0
7
6
5
4
W
R
SCI Control Register 2 (SCIxC2)
Parity Enable. Enables hardware parity generation and checking. When parity is enabled, the most significant bit
(msb) of the data character (eighth or ninth data bit) is treated as the parity bit.
0 No hardware parity generation or checking.
1 Parity enabled.
Parity Type. Provided parity is enabled (PE = 1), this bit selects even or odd parity. Odd parity means the total
number of 1s in the data character, including the parity bit, is odd. Even parity means the total number of 1s in
the data character, including the parity bit, is even.
0 Even parity.
1 Odd parity.
TIE
Transmit Interrupt Enable (for TDRE)
0 Hardware interrupts from TDRE disabled (use polling).
1 Hardware interrupt requested when TDRE flag is 1.
Transmission Complete Interrupt Enable (for TC)
0 Hardware interrupts from TC disabled (use polling).
1 Hardware interrupt requested when TC flag is 1.
Receiver Interrupt Enable (for RDRF)
0 Hardware interrupts from RDRF disabled (use polling).
1 Hardware interrupt requested when RDRF flag is 1.
Idle Line Interrupt Enable (for IDLE)
0 Hardware interrupts from IDLE disabled (use polling).
1 Hardware interrupt requested when IDLE flag is 1.
0
7
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
TCIE
0
6
Table 18-3. SCIxC1 Field Descriptions (continued)
Figure 18-6. SCI Control Register 2 (SCIxC2)
Table 18-4. SCIxC2 Field Descriptions
RIE
0
5
ILIE
0
4
Description
Description
TE
3
0
RE
0
2
Freescale Semiconductor
RWU
0
1
SBK
0
0