mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 435

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mcf51ac256a

Manufacturer Part Number
mcf51ac256a
Description
Mcf51ac Flexis
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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19.4.4
This register has three read-only status bits. Bits 6, 3, 2, 1, and 0 are not reserved and always read 0. Writes
have no meaning or effect.
Freescale Semiconductor
Reset
SPPR
Field
SPR
6–4
2–0
7
3
W
R
SPRF
SPI Status Register (SPI1S)
Reserved, should be cleared.
SPI Baud Rate Prescale Divisor. This 3-bit field selects one of eight divisors for the SPI baud rate prescaler as
shown below. The input to this prescaler is the bus rate clock (BUSCLK). The output of this prescaler drives the
input of the SPI baud rate divider (see
Reserved, should be cleared.
SPI Baud Rate Divisor. This 3-bit field selects one of eight divisors for the SPI baud rate divider as shown below.
The SPI baud rate prescaler supplies the input to this divider (see
SPI bit rate clock for master mode.
0
7
SPPR Prescaler Divisor
SPR
000
001
010
011
000
001
010
011
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
Rate Divisor
0
0
6
Table 19-4. SPI1BR Register Field Descriptions
16
1
2
3
4
2
4
8
Figure 19-7. SPI Status Register (SPI1S)
SPTEF
1
5
SPPR Prescaler Divisor
SPR
100
101
110
111
100
101
110
111
Figure
MODF
Rate Divisor
0
4
19-3).
Description
128
256
32
64
5
6
7
8
3
0
0
Figure
19-3). The output of this divider is the
8-Bit Serial Peripheral Interface (SPIV3)
0
2
0
0
0
1
0
0
0
19-9

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