mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 282

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

Inter-Integrated Circuit (IICV2)
12.4
This section provides a complete functional description of the IIC module.
12.4.1
The IIC bus system uses a serial data line (SDA) and a serial clock line (SCL) for data transfer. All devices
connected to it must have open drain or open collector outputs. A logic AND function is exercised on both
lines with external pull-up resistors. The value of these resistors is system dependent.
Normally, a standard communication is composed of four parts:
The stop signal should not be confused with the CPU stop instruction. The IIC bus system communication
is described briefly in the following sections and illustrated in
12-10
AD[10:8]
GCAEN
ADEXT
Field
•
•
•
•
2–0
7
6
Start signal
Slave address transmission
Data transfer
Stop signal
Functional Description
IIC Protocol
General Call Address Enable. The GCAEN bit enables or disables general call address.
0 General call address is disabled
1 General call address is enabled
Address Extension. The ADEXT bit controls the number of bits used for the slave address.
0 7-bit address scheme
1 10-bit address scheme
Slave Address. The AD[10:8] field contains the upper three bits of the slave address in the 10-bit address
scheme. This field is only valid when the ADEXT bit is set.
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
Table 12-8. IICC2 Field Descriptions
Description
Figure
12-8.
Freescale Semiconductor