mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 277

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

For example, if the bus speed is 8 MHz, the table below shows the possible hold time values with different
ICR and MULT selections to achieve an IIC baud rate of 100kbps.
Freescale Semiconductor
MULT
Field
ICR
7–6
5–0
IIC Multiplier Factor. The MULT bits define the multiplier factor, mul. This factor, along with the SCL divider,
generates the IIC baud rate. The multiplier factor mul as defined by the MULT bits is provided below.
00 mul = 01
01 mul = 02
10 mul = 04
11 Reserved
IIC Clock Rate. The ICR bits are used to prescale the bus clock for bit rate selection. These bits and the MULT
bits determine the IIC baud rate, the SDA hold time, the SCL Start hold time, and the SCL Stop hold time.
Table 12-4
The SCL divider multiplied by multiplier factor mul generates IIC baud rate.
SDA hold time is the delay from the falling edge of SCL (IIC clock) to the changing of SDA (IIC data).
SCL start hold time is the delay from the falling edge of SDA (IIC data) while SCL is high (Start condition) to the
falling edge of SCL (IIC clock).
SCL stop hold time is the delay from the rising edge of SCL (IIC clock) to the rising edge of SDA
SDA (IIC data) while SCL is high (Stop condition).
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
MULT
provides the SCL divider and hold values for corresponding values of the ICR.
SCL Start hold time = bus period (s) × mul × SCL Start hold value
0x2
0x1
0x1
0x0
0x0
SCL Stop hold time = bus period (s) × mul × SCL Stop hold value
SDA hold time = bus period (s) × mul × SDA hold value
Table 12-3. Hold Time Values for 8 MHz Bus Speed
Table 12-2. IICF Field Descriptions
0x0B
0x00
0x07
0x14
0x18
ICR
IIC baud rate
3.500
2.500
2.250
2.125
1.125
SDA
=
Description
------------------------------------------ -
mul SCLdivider
bus speed (Hz)
×
Hold Times (μs)
SCL Start
4.750
4.250
4.000
4.000
3.000
SCL Stop
5.125
5.125
5.250
5.250
5.500
Inter-Integrated Circuit (IICV2)
Eqn. 12-1
Eqn. 12-2
Eqn. 12-3
Eqn. 12-4
12-5