mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 188

no-image

mcf51ac256a

Manufacturer Part Number
mcf51ac256a
Description
Mcf51ac Flexis
Manufacturer
Freescale Semiconductor, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
mcf51ac256aCFGE
Manufacturer:
FREESCALE
Quantity:
2 400
Part Number:
mcf51ac256aCFGE
Manufacturer:
FREESCALE
Quantity:
2 400
Part Number:
mcf51ac256aCFUE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf51ac256aCLKE
Manufacturer:
FREESCALE
Quantity:
1 500
Part Number:
mcf51ac256aCLKE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mcf51ac256aCPUE
Manufacturer:
MURATA
Quantity:
1 000
Analog-to-Digital Converter (S08ADC12V1)
9.5.1.2
In this example, the ADC module is set up with interrupts enabled to perform a single 10-bit conversion
at low power with a long sample time on input channel 1, where the internal ADCK clock is derived from
the bus clock divided by 1.
ADCCFG = 0x98 (%10011000)
ADCSC2 = 0x00 (%00000000)
ADCSC1 = 0x41 (%01000001)
ADCRH/L = 0xxx
ADCCVH/L = 0xxx
APCTL1=0x02
APCTL2=0x00
9-22
2. Update status and control register 2 (ADCSC2) to select the conversion trigger (hardware or
3. Update status and control register 1 (ADCSC1) to select whether conversions will be continuous
software) and compare function options, if enabled.
or completed only once, and to enable or disable conversion complete interrupts. The input channel
on which conversions will be performed is also selected here.
Bit 7
Bit 6:5 ADIV
Bit 4
Bit 3:2 MODE
Bit 1:0 ADICLK
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3:2
Bit 1:0
Bit 7
Bit 6
Bit 5
Bit 4:0 ADCH
Holds results of conversion. Read high byte (ADCRH) before low byte (ADCRL) so that
conversion data cannot be overwritten with data from the next conversion.
Holds compare value when compare function enabled
AD1 pin I/O control disabled. All other AD pins remain general purpose I/O pins
All other AD pins remain general purpose I/O pins
Pseudo-Code Example
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
ADLPC
ADLSMP
ADACT
ADTRG
ACFE
ACFGT
COCO
AIEN
ADCO
1
00
1
10
00
0
0
0
0
00
00
0
1
0
00001
Configures for low power (lowers maximum clock speed)
Sets the ADCK to the input clock ÷ 1
Configures for long sample time
Sets mode at 10-bit conversions
Selects bus clock as input clock source
Flag indicates if a conversion is in progress
Software trigger selected
Compare function disabled
Not used in this example
Reserved, always reads zero
Reserved for Freescale’s internal use; always write zero
Read-only flag which is set when a conversion completes
Conversion complete interrupt enabled
One conversion only (continuous conversions disabled)
Input channel 1 selected as ADC input channel
Freescale Semiconductor

Related parts for mcf51ac256a