mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 289

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mcf51ac256a

Manufacturer Part Number
mcf51ac256a
Description
Mcf51ac Flexis
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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12.7
Freescale Semiconductor
Initialization/Application Information
1.
2.
3.
4.
5.
1.
2.
3.
4.
5.
6.
7.
Write: IICC2
— to enable or disable general call
— to select 10-bit or 7-bit addressing mode
Write: IICA
— to set the slave address
Write: IICC1
— to enable IIC and interrupts
Initialize RAM variables (IICEN = 1 and IICIE = 1) for transmit data
Initialize RAM variables used to achieve the routine shown in
Write: IICF
— to set the IIC baud rate (example provided in this chapter)
Write: IICC1
— to enable IIC and interrupts
Initialize RAM variables (IICEN = 1 and IICIE = 1) for transmit data
Initialize RAM variables used to achieve the routine shown in
Write: IICC1
— to enable TX
Write: IICC1
— to enable MST (master mode)
Write: IICD
— with the address of the target slave. (The lsb of this byte determines whether the communication is master receive
The routine shown in
message that contains the proper address begins IIC communication. For master operation, communication must be
initiated by writing to the IICD register.
IICC1
IICC2 GCAEN ADEXT
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
IICA
IICS
IICD
IICF
or transmit.)
When addressed as a slave (in slave mode), the module responds to this address
Data register; Write to transmit IIC data read to read IIC data
Baud rate = BUSCLK / (2 x MULT x (SCL DIVIDER))
Module configuration
Module status flags
Address configuration
IICEN
TCF
MULT
Figure 12-11
IAAS
IICIE
Figure 12-10. IIC Module Quick Start
BUSY
can manage master and slave IIC operations. For slave operation, an incoming IIC
MST
Module Initialization (Master)
Module Initialization (Slave)
0
Register Model
ARBL
Module Use
TX
AD[7:1]
0
DATA
TXAK
0
0
Figure 12-11
Figure 12-11
ICR
RSTA
SRW
AD10
IICIF
AD9
0
Inter-Integrated Circuit (IICV2)
RXAK
AD8
0
0
12-17

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