mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 270
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mcf51ac256a
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Mcf51ac Flexis
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Freescale Semiconductor, Inc
Datasheet
1.MCF51AC256A.pdf
(566 pages)
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FlexTimer Module (FTMV1)
Figure 11-84. Initialization trigger generated if (FTMxCNTH:L = FTMxCNTINH:L) and (CLKS[1:0] = 00) and a
11.4.20 TPM Emulation
This section describe the FTM features that are selected according to the FTMEN bit.
11.4.20.1 FTM counter clock
If (CLKS[1:0] = 01), then FTMEN bit selects if the system clock is divided by 1 or divided by 2 in the
FTM
If (CLKS[1:0] = 01) and (FTMEN = 0), then the clock of FTM counter is the system clock divided by 2.
If (CLKS[1:0] = 01) and (FTMEN = 1), then the clock of FTM counter is the system clock.
11.4.20.2 FTMxMODH:L and FTMxCnVH:L synchronization
If (FTMEN = 0), then the FTMxMODH:L and FTMxCnVH:L registers are updated according to the
Section 11.4.10, “Load of the registers with write buffers
synchronization.
If (FTMEN = 1), then the FTMxMODH:L and FTMxCnVH:L registers are updated only by PWM
synchronization
11.4.20.3 Free-running counter
If (FTMEN = 0), then the FTM counter is a free-running counter when (FTMxMODH:L = 0x0000) or
(FTMxMODH:L = 0xFFFF)
11-70
(Section 11.3.3, “FTM Status and Control Register
FTMxCNTINH:L = 0x0000
FTMxMODH:L = 0x000F
CPWMS = 0
Initialization trigger is only available when (FTMEN = 1) and (COMBINE
= 1) and (CPWMS = 0). Initialization trigger with (FTMEN = 0) or
(COMBINE = 0) or (CPWMS = 1) is not recommended and its results are
not guaranteed.
(Section 11.4.11, “PWM
initialization trigger
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
CLKS[1:0] bits
system clock
FTM counter
value different from zero is written to CLKS[1:0] bits
(Section 11.4.3.3, “Free running
synchronization).
00
0x00
NOTE
(FTMxSC)).
and they are not updated by PWM
counter).
0x01
0x02
01
0x03
0x04
Freescale Semiconductor
0x05
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