mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 338

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

Freescale’s Controller Area Network (MSCANV1)
Figure 15-22
identifiers. The mapping of standard identifiers into the IDR registers is shown in
All bits of the receive and transmit buffers are ‘x’ out of reset because of RAM-based implementation
All reserved or unused bits of the receive and transmit buffers always read ‘x’.
1. Exception: The transmit priority registers are 0 out of reset.
15-22
1
2
3
shows the common 13-byte data structure of receive and transmit buffers for extended
Not applicable for receive buffers
Read-only for CPU
Read-only for CPU
Address
0x00XA
0x00XB
0x00XC
0x00XD
0x00XE
0x00XF
0x00X0
0x00X1
0x00X2
0x00X3
0x00X4
0x00X5
0x00X6
0x00X7
0x00X8
0x00X9
Offset
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
Identifier Register 0
Identifier Register 1
Identifier Register 2
Identifier Register 3
Data Segment Register 0
Data Segment Register 1
Data Segment Register 2
Data Segment Register 3
Data Segment Register 4
Data Segment Register 5
Data Segment Register 6
Data Segment Register 7
Data Length Register
Transmit Buffer Priority Register
Time Stamp Register (High Byte)
Time Stamp Register (Low Byte)
Table 15-24. Message Buffer Organization
1
3
2
Register
Figure
Freescale Semiconductor
15-23.
1
.