mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 434

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

8-Bit Serial Peripheral Interface (SPIV3)
19.4.3
This register sets the prescaler and bit rate divisor for an SPI master. This register may be read or written
at any time.
19-8
MODFEN
BIDIROE
SPISWAI
Reset
Reset
SPC0
Field
7–5
4
3
2
1
0
W
W
R
R
SPI Baud Rate Register (SPI1BR)
Reserved, should be cleared.
Master Mode-Fault Function Enable. When the SPI is configured for slave mode, this bit has no meaning or
effect. (The SS pin is the slave select input.) In master mode, this bit determines how the SS pin is used (refer to
Table 19-2
0 Mode fault function disabled, master SS pin reverts to general-purpose I/O not controlled by SPI
1 Mode fault function enabled, master SS pin acts as the mode fault input or the slave select output
Bidirectional Mode Output Enable. When bidirectional mode is enabled by setting SPC0, BIDIROE determines
whether the SPI data output driver is enabled to the single bidirectional SPI I/O pin. Depending on whether the
SPI is configured as a master or a slave, it uses the MOSI (MOMI) or MISO (SISO) pin, respectively, as the single
SPI data I/O pin. When SPC0 is cleared, BIDIROE has no meaning or effect.
0 Output driver disabled so SPI data I/O pin acts as an input
1 SPI I/O pin enabled as an output
Reserved, should be cleared.
SPI Stop in Wait Mode
0 SPI clocks continue to operate in wait mode
1 SPI clocks stop when the MCU enters wait mode
SPI Pin Control 0 — The SPC0 bit chooses single-wire bidirectional mode. If MSTR is cleared (slave mode), the
SPI uses the MISO (SISO) pin for bidirectional SPI data transfers. If MSTR is set (master mode), the SPI uses
the MOSI (MOMI) pin for bidirectional SPI data transfers. When SPC0 is set 1, BIDIROE enables or disables the
output driver for the single bidirectional SPI I/O pin.
0 SPI uses separate pins for data input and data output
1 SPI configured for single-wire bidirectional operation
0
0
0
0
7
7
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
for more details).
0
0
0
6
6
Table 19-3. SPI1C2 Register Field Descriptions
Figure 19-6. SPI Baud Rate Register (SPI1BR)
Figure 19-5. SPI Control Register 2 (SPI1C2)
SPPR
0
0
0
5
5
MODFEN
0
0
4
4
Description
BIDIROE
3
0
3
0
0
0
0
0
2
2
SPISWAI
Freescale Semiconductor
SPR
0
0
1
1
SPC0
0
0
0
0