AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 1022

• Manufacturer Part Number: AT91SAM9G45-EKES
• Description: KIT EVAL FOR AT91SAM9G45
• Manufacturer: Atmel
• Series: AT91SAM Smart ARMr
• Type: MCUr

Specifications of AT91SAM9G45-EKES

• Contents: Board
• Processor To Be Evaluated: SAM9G45
• Data Bus Width: 32 bit
• Interface Type: I2C, SPI, UART
• Maximum Operating Temperature: + 50 C
• Minimum Operating Temperature: - 10 C
• Operating Supply Voltage: 1.8 V to 3.3 V
• For Use With/related Products: AT91SAM9G45
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: Q4626953

• DST_DSCR
0: Destination address is updated when the descriptor is fetched from the memory.
1: Buffer Descriptor Fetch operation is disabled for the destination.
• FC
This field defines which device controls the size of the buffer transfer, also referred as to the Flow Controller.
• SRC_INCR
• DST_INCR
• IEN
If this bit is cleared, when the buffer transfer is completed, the BTC[x] flag is set in the EBCISR status register. This bit is
active low.
• AUTO
Automatic multiple buffer transfer is enabled. When set, this bit enables replay mode or contiguous mode when several buf-
fers are transferred.
6438F–ATARM–21-Jun-10
SRC_INCR
DST_INCR
000
001
010
011
100
101
110
111
FC
00
01
10
00
01
10
Type of addressing scheme
Peripheral-to-Peripheral
Peripheral-to-Peripheral
Peripheral-to-Peripheral
Type of addressing mode
Memory-to-Peripheral
Peripheral-to-Memory
Peripheral-to-Memory
Memory-to-Peripheral
Memory-to-Memory
DECREMENTING
INCREMENTING
DECREMENTING
Type of transfer
INCREMENTING
FIXED
FIXED
Destination Peripheral
Source Peripheral
DMA Controller
DMA Controller
DMA Controller
DMA Controller
Flow Controller
Peripheral
Peripheral
AT91SAM9G45
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