AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 1023
AT91SAM9G45-EKES
Manufacturer Part Number
AT91SAM9G45-EKES
Description
KIT EVAL FOR AT91SAM9G45
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr
Datasheets
1.AT91SAM9G45-EKES.pdf
(56 pages)
2.AT91SAM9G45-EKES.pdf
(1218 pages)
3.AT91SAM9G45-EKES.pdf
(66 pages)
Specifications of AT91SAM9G45-EKES
Contents
Board
Processor To Be Evaluated
SAM9G45
Data Bus Width
32 bit
Interface Type
I2C, SPI, UART
Maximum Operating Temperature
+ 50 C
Minimum Operating Temperature
- 10 C
Operating Supply Voltage
1.8 V to 3.3 V
For Use With/related Products
AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4626953
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- Download datasheet (19Mb)
41.6.18
Name:
Addresses: 0xFFFFEC50 [0], 0xFFFFEC78 [1], 0xFFFFECA0 [2], 0xFFFFECC8 [3], 0xFFFFECF0 [4], 0xFFFFED18 [5],
Access:
Reset:
• SRC_PER
Channel x Source Request is associated with peripheral identifier coded SRC_PER handshaking interface.
• DST_PER
Channel x Destination Request is associated with peripheral identifier coded DST_PER handshaking interface.
• SRC_REP
0: When automatic mode is activated, source address is contiguous between two buffers.
1: When automatic mode is activated, the source address and the control register are reloaded from previous transfer.
• SRC_H2SEL
0: Software handshaking interface is used to trigger a transfer request.
1: Hardware handshaking interface is used to trigger a transfer request.
• DST_REP
0: When automatic mode is activated, destination address is contiguous between two buffers.
1: When automatic mode is activated, the destination and the control register are reloaded from the previous transfer.
• DST_H2SEL
0: Software handshaking interface is used to trigger a transfer request.
1: Hardware handshaking interface is used to trigger a transfer request.
• SOD
0: STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register.
1: STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1.
6438F–ATARM–21-Jun-10
31
23
15
–
–
–
7
DMAC Channel x [x = 0..7] Configuration Register
DMAC_CFGx [x = 0..7]
0xFFFFED40 [6], 0xFFFFED68 [7]
Read-write
0x0100000000
LOCK_IF_L
30
22
14
–
–
6
DST_PER
DST_H2SEL
LOCK_B
29
21
13
5
FIFOCFG
DST_REP
LOCK_IF
28
20
12
4
27
19
11
–
–
–
3
26
18
10
–
–
2
SRC_PER
SRC_H2SEL
AT91SAM9G45
AHB_PROT
25
17
–
9
1
SRC_REP
SOD
24
16
8
0
1023
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