AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 222

KIT EVAL FOR AT91SAM9G45

AT91SAM9G45-EKES

Manufacturer Part Number
AT91SAM9G45-EKES
Description
KIT EVAL FOR AT91SAM9G45
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr

Specifications of AT91SAM9G45-EKES

Contents
Board
Processor To Be Evaluated
SAM9G45
Data Bus Width
32 bit
Interface Type
I2C, SPI, UART
Maximum Operating Temperature
+ 50 C
Minimum Operating Temperature
- 10 C
Operating Supply Voltage
1.8 V to 3.3 V
For Use With/related Products
AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4626953
21.15 Static Memory Controller (SMC) User Interface
The SMC is programmed using the registers listed in
gram the parameters of the external device connected on it. In
16 bytes (0x10) are required per chip select.
The user must complete writing the configuration by writing any one of the SMC_MODE registers.
Table 21-8.
6438F–ATARM–21-Jun-10
0x10 x CS_number + 0x00
0x10 x CS_number + 0x04
0x10 x CS_number + 0x08
0x10 x CS_number + 0x0C
0xC0
0xC4
0xC8
0xCC
0xD0
0xD4
0xD8
0xDC
0xEC-0xFC
Offset
Register Mapping
Register
SMC Setup Register
SMC Pulse Register
SMC Cycle Register
SMC Mode Register
SMC Delay on I/O
SMC Delay on I/O
SMC Delay on I/O
SMC Delay on I/O
SMC Delay on I/O
SMC Delay on I/O
SMC Delay on I/O
SMC Delay on I/O
Reserved
Table
21-8. For each chip select, a set of 4 registers is used to pro-
SMC_DELAY1
SMC_DELAY2
SMC_DELAY3
SMC_DELAY4
SMC_DELAY5
SMC_DELAY6
SMC_DELAY7
SMC_DELAY8
Table
SMC_SETUP
SMC_PULSE
SMC_CYCLE
SMC_MODE
Name
-
21-8, “CS_number” denotes the chip select number.
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Access
-
AT91SAM9G45
0x01010101
0x10001000
0x01010101
0x00030003
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
Reset
-
222

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