AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 536
![KIT EVAL FOR AT91SAM9G45](/photos/9/26/92642/at91sam9g45-ekes_sml.jpg)
AT91SAM9G45-EKES
Manufacturer Part Number
AT91SAM9G45-EKES
Description
KIT EVAL FOR AT91SAM9G45
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr
Datasheets
1.AT91SAM9G45-EKES.pdf
(56 pages)
2.AT91SAM9G45-EKES.pdf
(1218 pages)
3.AT91SAM9G45-EKES.pdf
(66 pages)
Specifications of AT91SAM9G45-EKES
Contents
Board
Processor To Be Evaluated
SAM9G45
Data Bus Width
32 bit
Interface Type
I2C, SPI, UART
Maximum Operating Temperature
+ 50 C
Minimum Operating Temperature
- 10 C
Operating Supply Voltage
1.8 V to 3.3 V
For Use With/related Products
AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4626953
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- Download datasheet (19Mb)
Figure 32-8. WAVSEL= 00 with trigger
32.6.11.2
Figure 32-9. WAVSEL = 10 Without Trigger
536
AT91SAM9G45
WAVSEL = 10
Waveform Examples
0xFFFF
Counter Value
R
R
R
TIOB
TIOA
C
B
A
When WAVSEL = 10, the value of TC_CV is incremented from 0 to the value of RC, then auto-
matically reset on a RC Compare. Once the value of TC_CV has been reset, it is then
incremented and so on. See
It is important to note that TC_CV can be reset at any time by an external event or a software
trigger if both are programmed correctly. See
In addition, RC Compare can stop the counter clock (CPCSTOP = 1 in TC_CMR) and/or disable
the counter clock (CPCDIS = 1 in TC_CMR).
Waveform Examples
0xFFFF
Counter Value
R
R
R
TIOB
TIOA
C
B
A
Counter cleared by compare match with RC
Figure
Counter cleared by compare match with 0xFFFF
32-9.
Counter cleared by trigger
Figure
32-10.
Time
Time
6438F–ATARM–21-Jun-10
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