AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 814
AT91SAM9G45-EKES
Manufacturer Part Number
AT91SAM9G45-EKES
Description
KIT EVAL FOR AT91SAM9G45
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr
Datasheets
1.AT91SAM9G45-EKES.pdf
(56 pages)
2.AT91SAM9G45-EKES.pdf
(1218 pages)
3.AT91SAM9G45-EKES.pdf
(66 pages)
Specifications of AT91SAM9G45-EKES
Contents
Board
Processor To Be Evaluated
SAM9G45
Data Bus Width
32 bit
Interface Type
I2C, SPI, UART
Maximum Operating Temperature
+ 50 C
Minimum Operating Temperature
- 10 C
Operating Supply Voltage
1.8 V to 3.3 V
For Use With/related Products
AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4626953
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36.13.16 HSMCI DMA Configuration Register
Name:
Addresses:
Access:
• OFFSET: DMA Write Buffer Offset
This field indicates the number of discarded bytes when the DMA writes the first word of the transfer.
• CHKSIZE: DMA Channel Read and Write Chunk Size
The CHKSIZE field indicates the number of data available when the DMA chunk transfer request is asserted.
• DMAEN: DMA Hardware Handshaking Enable
0 = DMA interface is disabled.
1 = DMA Interface is enabled.
Note:
• ROPT: Read Optimization with padding
0: BLKLEN bytes are moved from the Memory Card to the system memory, two DMA descriptors are used when the trans-
fer size is not a multiple of 4.
1: Ceiling(BLKLEN/4) * 4 bytes are moved from the Memory Card to the system memory, only one DMA descriptor is used.
6438F–ATARM–21-Jun-10
31
23
15
–
–
7
–
To avoid unpredictable behavior, DMA hardware handshaking must be disabled when CPU transfers are performed.
CHKSIZE value
00
01
10
11
30
22
14
HSMCI_DMA
0xFFF80050 (0), 0xFFFD0050 (1)
Read-write
–
–
6
–
Number of data transferred
29
21
13
–
–
–
5
CHKSIZE
16
1
4
8
ROPT
28
20
12
–
–
4
27
19
11
–
–
–
3
–
26
18
10
–
–
–
2
–
AT91SAM9G45
25
17
–
–
9
–
1
OFFSET
DMAEN
24
16
–
–
8
0
814
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