AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 1196
AT91SAM9G45-EKES
Manufacturer Part Number
AT91SAM9G45-EKES
Description
KIT EVAL FOR AT91SAM9G45
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr
Datasheets
1.AT91SAM9G45-EKES.pdf
(56 pages)
2.AT91SAM9G45-EKES.pdf
(1218 pages)
3.AT91SAM9G45-EKES.pdf
(66 pages)
Specifications of AT91SAM9G45-EKES
Contents
Board
Processor To Be Evaluated
SAM9G45
Data Bus Width
32 bit
Interface Type
I2C, SPI, UART
Maximum Operating Temperature
+ 50 C
Minimum Operating Temperature
- 10 C
Operating Supply Voltage
1.8 V to 3.3 V
For Use With/related Products
AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4626953
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- Download datasheet (19Mb)
49.2
49.2.1
49.2.1.1
49.2.2
49.2.2.1
49.2.2.2
49.2.2.3
49.2.2.4
49.2.3
49.2.3.1
1196
Errata
AT91SAM9G45
Boot ROM
Error Corrected Code Controller (ECC)
Pulse Width Modulation Controller (PWM)
Boot ROM: NAND Flash boot does not support ECC Correction
ECC: Computation with a 1 clock cycle long NRD/NWE pulse
Uncomplete parity status when error in ECC parity
Unsupported ECC per 512 words
Unsupported hardware ECC on 16-bit Nand Flash
PWM: Zero Period
The boot ROM allows booting from block 0 of a NAND Flash connected on CS3. However, the
boot ROM does not feature ECC correction on a NAND Flash.
Most of the NAND Flash vendors do not guarantee anymore that block 0 is error free. Therefore
we advise to locate the bootstrap program into another device supported by the boot ROM
(DataFlash, Serial Flash, SDCARD or EEPROM), and to implement a NAND Flash access with
ECC.
None.
If the SMC is programmed with NRD/NWE pulse length equal to 1 clock cycle, HECC can't com-
pute the parity.
It is recommended to program SMC with a value superior to 1.
When a single correctable error is detected in ECC value, the error is located in ECC Parity reg-
ister's field which contains a 1 in the 24 least significant bits except when the error is located in
the 12th or the 24th bit. In this case, these bits are always stuck at 0.
A Single correctable error is detected but it is impossible to correct it.
None.
1 bit ECC per 512 words is not functional.
Perform the ECC computation by software.
Hardware ECC on 16-bit Nand Flash is not supported.
Perform the ECC by software.
It is impossible to update a period equal to 0 by using the PWM_CUPD register.
None
Problem/Fix Workaround
Problem/Fix Workaround
Problem/Fix Workaround
Problem/Fix Workaround
Problem/Fix Workaround
Problem/Fix Workaround
6438F–ATARM–21-Jun-10
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