AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 163
![KIT EVAL FOR AT91SAM9G45](/photos/9/26/92642/at91sam9g45-ekes_sml.jpg)
AT91SAM9G45-EKES
Manufacturer Part Number
AT91SAM9G45-EKES
Description
KIT EVAL FOR AT91SAM9G45
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr
Datasheets
1.AT91SAM9G45-EKES.pdf
(56 pages)
2.AT91SAM9G45-EKES.pdf
(1218 pages)
3.AT91SAM9G45-EKES.pdf
(66 pages)
Specifications of AT91SAM9G45-EKES
Contents
Board
Processor To Be Evaluated
SAM9G45
Data Bus Width
32 bit
Interface Type
I2C, SPI, UART
Maximum Operating Temperature
+ 50 C
Minimum Operating Temperature
- 10 C
Operating Supply Voltage
1.8 V to 3.3 V
For Use With/related Products
AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4626953
- Current page: 163 of 1218
- Download datasheet (19Mb)
20.2.4
Table 20-2.
6438F–ATARM–21-Jun-10
Name
EBI_D0 - EBI_D31
EBI_A0 - EBI_A25
EBI_NWAIT
EBI_NCS0 - EBI_NCS5
EBI_NWR0 - EBI_NWR3
EBI_NRD
EBI_NWE
EBI_NBS0 - EBI_NBS3
EBI_NANDCS
EBI_NANDOE
EBI_NANDWE
EBI_SDCK, EBI_SDCK#
EBI_SDCKE
EBI_SDCS
EBI_BA0 - EBI_BA1
EBI_SDWE
EBI_RAS - EBI_CAS
EBI_SDA10
I/O Lines Description
EBI I/O Lines Description
The connection of some signals through the MUX logic is not direct and depends on the Memory
Controller in use at the moment.
Table 20-3 on page 163
EBI pins.
Table 20-3.
EBI_NWR1/NBS1/CFIOR
EBI_A0/NBS0
EBI_A1/NBS2/NWR2
EBI_A[11:2]
EBI_SDA10
EBI_A12
EBI_A[14:13]
EBI_A[25:15]
EBI_D[31:0]
Chip Select Lines
Read Signal
NAND Flash Chip Select Line
NAND Flash Output Enable
NAND Flash Write Enable
DDR2/SDRAM Differential Clock
DDR2/SDRAM Clock Enable
Bank Select
SDRAM Address 10 Line
Function
Data Bus
Address Bus
External Wait Signal
Write Signals
Write Enable
Byte Mask Signals
DDR2/SDRAM Controller Chip Select Line
DDR2/SDRAM Write Enable
Row and Column Signal
EBI Pins and Memory Controllers I/O Lines Connections
EBIx Pins
EBI for NAND Flash Support
DDR2/SDRAM Controller
details the connections between the two Memory Controllers and the
SMC
EBI
NBS1
Not Supported
Not Supported
SDRAMC_A[9:0]
SDRAMC_A10
Not Supported
SDRAMC_A[12:11]
Not Supported
D[31:0]
SDRAM I/O Lines
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Type
Input
AT91SAM9G45
I/O
NWR1
SMC_A0
SMC_A1
SMC_A[11:2]
Not Supported
SMC_A12
SMC_A[14:13]
SMC_A[25:15]
D[31:0]
SMC I/O Lines
Active Level
High
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
163
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