AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 293

• Manufacturer Part Number: AT91SAM9G45-EKES
• Description: KIT EVAL FOR AT91SAM9G45
• Manufacturer: Atmel
• Series: AT91SAM Smart ARMr
• Type: MCUr

Specifications of AT91SAM9G45-EKES

• Contents: Board
• Processor To Be Evaluated: SAM9G45
• Data Bus Width: 32 bit
• Interface Type: I2C, SPI, UART
• Maximum Operating Temperature: + 50 C
• Minimum Operating Temperature: - 10 C
• Operating Supply Voltage: 1.8 V to 3.3 V
• For Use With/related Products: AT91SAM9G45
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: Q4626953

24. Clock Generator
24.1
24.2
24.3
6438F–ATARM–21-Jun-10
Description
Embedded Characteristics
Slow Clock Crystal Oscillator
The Clock Generator User Interface is embedded within the Power Management Controller
Interface and is described in
CKGR_.
The Clock Generator is made up of:
The USB Device and Host HS Clocks are provided by a the dedicated UTMI PLL (UPLL)
embedded in the UTMI macro.
Figure 24-1. Clock Generator Block Diagram
The Clock Generator integrates a 32,768 Hz low-power oscillator. The XIN32 and XOUT32 pins
must be connected to a 32,768 Hz crystal. Two external capacitors must be wired as shown in
Figure
• One Low Power 32768 Hz Slow Clock Oscillator with bypass mode
• One Low-Power RC oscillator
• One 12 MHz Main Oscillator, which can be bypassed
• One 400 to 800 MHz programmable PLLA, capable to provide the clock MCK to the
processor and to the peripherals. This PLL has an input divider to offer a wider range of
output frequencies from the 12 MHz input, the only limitation being the lowest input frequency
shall be higher or equal to 2 MHz.
24-2.
XOUT32
XIN32
XOUT
XIN
Section
25.11. However, the Clock Generator registers are named
Clock Generator
Management
12M Main
PLLA and
Slow Clock
Controller
On Chip
RC OSC
Oscillator
Status
Oscillator
Divider
Power
UPLL
Control
RCEN
Slow Clock
SLCK
OSCSEL
OSC32EN
OSC32BYP
Main Clock
MAINCK
UPLLCK
PLLA Clock
PLLACK
AT91SAM9G45
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