AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 612

KIT EVAL FOR AT91SAM9G45

AT91SAM9G45-EKES

Manufacturer Part Number
AT91SAM9G45-EKES
Description
KIT EVAL FOR AT91SAM9G45
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr

Specifications of AT91SAM9G45-EKES

Contents
Board
Processor To Be Evaluated
SAM9G45
Data Bus Width
32 bit
Interface Type
I2C, SPI, UART
Maximum Operating Temperature
+ 50 C
Minimum Operating Temperature
- 10 C
Operating Supply Voltage
1.8 V to 3.3 V
For Use With/related Products
AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4626953
Figure 33-49. Slave Node Configuration, NACT = PUBLISH
Figure 33-50. Slave Node Configuration, NACT = SUBSCRIBE
Figure 33-51. Slave Node Configuration, NACT = IGNORE
33.7.8.22
6438F–ATARM–21-Jun-10
TXRDY
RXRDY
LINIDRX
US_LINID
US_RHR
LINTC
TXRDY
RXRDY
LINIDRX
US_LINID
US_RHR
LINTC
TXRDY
RXRDY
LINIDRX
US_LINID
US_THR
LINTC
Write
Read
Read
Read
Read
Read
LIN Frame Handling With The Peripheral DMA Controller
Break
Break
Break
The USART can be used in association with the Peripheral DMA Controller (PDC) in order to
transfer data directly into/from the on- and off-chip memories without any processor intervention.
Synch
Synch
Synch
– Check the LIN errors
Protected
Protected
Protected
Identifier
Identifier
Identifier
Data 1
Data 2
Data 1
Data 1
Data 1
Data 1
Data 3
Data N-2
Data N
Data N-1
Data N-1
Data N-1
Data N-1
Data N
Data N
Data N
AT91SAM9G45
Data N
Checksum
Checksum
Checksum
612

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