AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 230

KIT EVAL FOR AT91SAM9G45

AT91SAM9G45-EKES

Manufacturer Part Number
AT91SAM9G45-EKES
Description
KIT EVAL FOR AT91SAM9G45
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr

Specifications of AT91SAM9G45-EKES

Contents
Board
Processor To Be Evaluated
SAM9G45
Data Bus Width
32 bit
Interface Type
I2C, SPI, UART
Maximum Operating Temperature
+ 50 C
Minimum Operating Temperature
- 10 C
Operating Supply Voltage
1.8 V to 3.3 V
For Use With/related Products
AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4626953
22.2
Figure 22-1.
230
AHB Slave Interface 0
AHB Slave Interface 1
AHB Slave Interface 2
AHB Slave Interface 3
DDRSDRC Module Diagram
AT91SAM9G45
DDRSDRC Module Diagram
APB
DDRSDRC is partitioned in two blocks (see
• An Interconnect-Matrix that manages concurrent accesses on the AHB bus between four
• A controller that translates AHB requests (Read/Write) in the SDRAM protocol.
AHB masters and integrates an arbiter.
Stage
Stage
Stage
Stage
Input
Input
Input
Input
Interconnect Matrix
Interface APB
Output
Arbiter
Stage
SDRAM Signal Management
Asynchronous Timing
Refresh Management
DDR-SDR Controller
Finite State Machine
Power Management
Memory Controller
Figure
22-1):
Addr, DQM
ras,cas,we
cke
clk/nclk
Data
DQS
odt
6438F–ATARM–21-Jun-10
DDR-SDR
Devices

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