AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 266

• Manufacturer Part Number: AT91SAM9G45-EKES
• Description: KIT EVAL FOR AT91SAM9G45
• Manufacturer: Atmel
• Series: AT91SAM Smart ARMr
• Type: MCUr

Specifications of AT91SAM9G45-EKES

• Contents: Board
• Processor To Be Evaluated: SAM9G45
• Data Bus Width: 32 bit
• Interface Type: I2C, SPI, UART
• Maximum Operating Temperature: + 50 C
• Minimum Operating Temperature: - 10 C
• Operating Supply Voltage: 1.8 V to 3.3 V
• For Use With/related Products: AT91SAM9G45
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: Q4626953

• TWTR: Internal Write to Read Delay
Reset value is 0.
This field defines the internal write to read command Time in number of cycles. Number of cycles is between 1 and 7.
In the case of low-power DDR-SDRAM device only bit 24 (TWTR[0]) is used. Bit [26:25] must be set to 0.
• REDUCE_WRRD: Reduce Write to Read Delay
Reset value is 0.
This field reduces the delay between write to read access for low-power DDR-SDRAM devices with a latency equal to 2. To
use this feature, TWTR field must be equal to 0. Important to note is that some devices do not support this feature.
• TMRD: Load Mode Register Command to Active or Refresh Command
Reset Value is 2 cycles.
This field defines the delay between a Load mode register command and an active or refresh command in number of
cycles. Number of cycles is between 0 and 15.
266
Bit 24 (twtr[0])
AT91SAM9G45
0
1
Twtr value
1
2
6438F–ATARM–21-Jun-10