AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 251

• Manufacturer Part Number: AT91SAM9G45-EKES
• Description: KIT EVAL FOR AT91SAM9G45
• Manufacturer: Atmel
• Series: AT91SAM Smart ARMr
• Type: MCUr

Specifications of AT91SAM9G45-EKES

• Contents: Board
• Processor To Be Evaluated: SAM9G45
• Data Bus Width: 32 bit
• Interface Type: I2C, SPI, UART
• Maximum Operating Temperature: + 50 C
• Minimum Operating Temperature: - 10 C
• Operating Supply Voltage: 1.8 V to 3.3 V
• For Use With/related Products: AT91SAM9G45
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: Q4626953

22.4.4.4
6438F–ATARM–21-Jun-10
Reset Mode
The reset mode is a feature of the DDR2-SDRAM. This mode is activated by setting the low-
power command bits (LPCB) to 11 and the clock frozen command bit (CLK_FR) to 1.
When this mode is enabled, the DDRSDRC leaves normal mode (mode == 000) and the control-
ler is frozen. Before enabling this mode, the end user must assume there is not an access in
progress.
To exit reset mode, the low-power command bits (LPCB) must be set to “00”, clock frozen com-
mand bit (CLK_FR) set to 0 and an initialization sequence must be generated by software. See,
Section 22.3.3 “DDR2-SDRAM Initialization” on page
233.
AT91SAM9G45
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