TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 104

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

Sample2: Calculation examples for CPU + LDMA
Conditions 1:
Calculation example 1:
Conditions 2:
Calculation example 2:
CPU operation speed (f
Display RAM
Display size
Display quality
Refresh rate
t
LHSYNC [period: s]
CPU bus stop rate
CPU operation speed (f
Display RAM
Display size
Display quality : 4096 colors (STN)
Refresh rate
t
LHSYNC [period: s]
CPU bus stop rate
STOP
STOP
(LDMA)
(LDMA)
: 16-bit external SRAM (0 waits)
: QVGA (240seg × 320com)
: 100 Hz (0 dummy cycles)
SYS
SYS
92CF26A-103
: Internal RAM
: QVGA (320seg × 240com)
: 65536 colors (TFT)
: 70 Hz (including 20 clocks of dummy cycles)
= ((SegNum × K / 8) × t
= 1/70 [Hz] / (COM+20=260) = 54.95 [μs]
= t
= (SegNum × K / 8) × t
= 1/100 [Hz] / (COM = 240) = 41.67 [μs]
= t
)
)
STOP
STOP
(LCD)[s] / LHSYNC [period: s]
(LCD)[s] / LHSYNC [period: s]
: 60 MHz
= ((320 × 16 / 8) × 1 / f
= ((640) × 16.67 [ns] / 4) + 16.67 [ns]
= 2.68 [μs]
= 2.68 [μs] / 54.95 [μs] = 4.88 [%]
: 10 MHz
= (240 × 12 / 8) × (2 + wait count) / f
= (360) × 200 [ns] / 2
= 36 [μs]
= 36 [μs] / 41.67 [μs] = 86.40 [%]
LRD
LRD
) + (1 / f
SYS
SYS
[Hz] / 4) + (1 / f
[Hz])
TMP92CF26A
SYS
2007-11-21
[Hz] / 2
SYS
[Hz])