TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 433

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

stage in hardware.
and control write transfer type (no data phase).
The Setup stage is completed by the above.
This flow is shown in Figure 3.16.6.
8-byte data that is transferred by this SETUP stage is device request.
The CPU must process corresponding to device request.
The UDC detects the following contents only from data of 8 bytes, and it manages
These are used to determine control read transfer type, control write transfer type,
3. Data packet is received.
4. After last data is transferred, counted CRC is compared with transferred CRC.
5. If CRC corresponds with toggle and it finishes normally, ACK handshake is
Device request of 8 bytes from SIE in UDC is transferred to the request register
below.
• bmRequestType register
• bmRequest register
• wValue register
• wIndex register
• wLength register
• Receiving device request is judged whether software control or hardware
• According to stage control flow, prepare for next stage.
• Set STATUS to DATAIN.
• Set toggle bit to “1”.
• Whether there is data stage or not
• Data stage direction
If they do not correspond, STATUS is set to RX_ERR and the state returns to
IDLE. At this point it does not return ACK, and host retries.
returned to host. The process in the UDC is shown below.
control. If the request needs control in software, INT_SETUP interrupt is
asserted. If hardware is used, INT_SETUP interrupt is not asserted.
92CF26A-432
TMP92CF26A
2007-11-21