TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 367

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

<TRX>
1
0
<AL>
1
0
1
0
<AAS> <AD0>
1
1
0
1
0
1
0
1/0
1/0
1/0
0
0
0
0
Table 3.15.2 Operation in the slave mode
The TMP92CF26A loses arbitration
when transmitting a slave address and
receives a slave address for which the
value of the direction bit sent from
another master is “1”.
In Salve Receiver Mode, the
TMP92CF26A receives a slave address
for which the value of the direction bit
sent from the master is “1”.
In Salve Transmitter Mode, a single
word of is transmitted.
The TMP92CF26A loses arbitration
when transmitting a slave address and
receives a slave address or GENERAL
CALL for which the value of the direction
bit sent from another master is “0”.
The TMP92CF26A loses arbitration
when transmitting a slave address or
data and terminates word data transfer.
In Slave Receiver Mode, the
TMP92CF26A receives a slave address
or GENERAL CALL for which the value
of the direction bit sent from the master
is “0”.
In Slave Receiver Mode, the
TMP92CF26A terminates receiving
word data.
92CF26A-366
Conditions
Set the number of bits a word in
<BC2:0> and write the transmitted data
to SBIDBR
Check the <LRB> setting. If <LRB> is
set to “1”, set <PIN> to “1” since the
receiver win no request the data which
follows. Then, clear <TRX> to “0” to
release the bus. If <LRB> is cleared to
“0”, set <BC2:0> to the number of bits in
a word and write the transmitted data to
SBIDBR since the receiver requests
next data.
Read the SBIDBR for setting the <PIN>
to “1” (reading dummy data) or set the
<PIN> to “1”.
Set <BC2:0> to the number of bits in a
word and read the received data from
SBIDBR.
Process
TMP92CF26A
2007-11-21