TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 456

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TMP92CF26AXBG

Manufacturer Part Number
TMP92CF26AXBG
Description
Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
Manufacturer
Toshiba
Datasheet

Specifications of TMP92CF26AXBG

Processor Series
TLCS-900
Core
900/H
Data Bus Width
16 bit
Program Memory Type
ROM
Program Memory Size
8 KB
Data Ram Size
144 KB
Interface Type
I2C, I2S, UART, USB
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
136
Number Of Timers
10
Maximum Operating Temperature
+ 50 C
Mounting Style
SMD/SMT
Package / Case
FBGA-228
Development Tools By Supplier
BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMP92CF26AXBG
Manufacturer:
TOSHIBA
Quantity:
4 000
Part Number:
TMP92CF26AXBG
Manufacturer:
TOSHIBA/东芝
Quantity:
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(4) Low power consumption by control of CLK input signal
power consumption condition. But as system, this function enables low power
consumption by stopping source of CLK that is supplied externally. CLK that is
supplied
USBINTFR1<INT_SUS> and <INT_CLKSTOP>.
<INT_CLKSTOP> is set to “1”. After confirmation, stop CLK supply (USBCLK) by
setting “0” to USBCR1<USBCLKE>. If SUSPEND signal is set to “0” by resuming
from host, supply normal CLK to UDC within 3 ms.
before use. When doubler circuit is used as generation source, the above control is
needed.
When the UDC switches to suspend condition, it stops CLK and switches to low
When remote wakeup is used, it is necessary to supply a stable CLK to the UDC
If UDC switches to suspend condition, USBINTFR1<INT_SUS> is set to “1”, and
to
the
UDC
92CF26A-455
can
control
clock
supply
to
USB
TMP92CF26A
2007-11-21
by
using

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