TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 329

no-image

TMP92CF26AXBG

Manufacturer Part Number
TMP92CF26AXBG
Description
Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
Manufacturer
Toshiba
Datasheet

Specifications of TMP92CF26AXBG

Processor Series
TLCS-900
Core
900/H
Data Bus Width
16 bit
Program Memory Type
ROM
Program Memory Size
8 KB
Data Ram Size
144 KB
Interface Type
I2C, I2S, UART, USB
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
136
Number Of Timers
10
Maximum Operating Temperature
+ 50 C
Mounting Style
SMD/SMT
Package / Case
FBGA-228
Development Tools By Supplier
BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMP92CF26AXBG
Manufacturer:
TOSHIBA
Quantity:
4 000
Part Number:
TMP92CF26AXBG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
Timing to writing to the
transmission buffer
Note 1: If the
Note 2: Transmission starts on the first falling edge of the TXDCLK clock after the
TXDCLK
CTS0
SIOCLK
TXD
transmission.
Handshake function
(1)
errors can be avoided. The handshake functions is enabled or disabled by the
SC0MOD<CTSE> setting.
transmission is halted until the
interrupt is generated, and it requests the next data send to from the CPU. The
next data is written in the transmission buffer and data sending is halted.
setting any port assigned to be the
“high” to request send data halt after data receive is completed by software in the
RXD interrupt routine.
CTS
Use of
When the
Though there is no
Send is suspended
from (1) and (2)
0
signal goes High during transmission, no more data will be sent after completion of the current
TMP92CF26A
CTS0
Sender
Figure 3.14.5
13
CTS0
Figure 3.14.4 Handshake function
CTS0
pin allows data can to be sent in units of one frame; thus, overrun
TXD
14
(2)
pin goes high on completion of the current data send, data
15
RTS
92CF26A-328
CTS
16
0
pin, a handshake function can be easily configured by
(Clear to send) Timing
1
CTS0
Start bit
2
RTS
pin goes low again. However, the INTTX0
3
function. The
RXD
RTS
TMP92CF26A
Receiver
(Any port)
14
CTS
15
0
signal has fallen.
RTS
16
should be output
1
TMP92CF26A
2007-11-21
bit0
2
3

Related parts for TMP92CF26AXBG