TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 189
TMP92CF26AXBG
Manufacturer Part Number
TMP92CF26AXBG
Description
Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
Manufacturer
Toshiba
Datasheet
1.TMP92CF26AXBG.pdf
(767 pages)
Specifications of TMP92CF26AXBG
Processor Series
TLCS-900
Core
900/H
Data Bus Width
16 bit
Program Memory Type
ROM
Program Memory Size
8 KB
Data Ram Size
144 KB
Interface Type
I2C, I2S, UART, USB
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
136
Number Of Timers
10
Maximum Operating Temperature
+ 50 C
Mounting Style
SMD/SMT
Package / Case
FBGA-228
Development Tools By Supplier
BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
TMP92CF26AXBG
Manufacturer:
TOSHIBA
Quantity:
4 000
Part Number:
TMP92CF26AXBG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
- Current page: 189 of 767
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CS space
CS0
CS1
CS2
CS3
Note: The “ Δ ” symbol indicates the sizes that may not be programmable depending on the combination of the values
(Byte)
(e) Priorities of the address spaces
(f) Specifying the number of wait states and the bus width for the address locations
Size
of the Memory Start Address and Memory Address Mask registers.
priority order of the address spaces are as follows:
states when an adress outside the CS0 to CS3 spaces (
registers are always enabled for the CSEX space.
outside the CS0 to CS3 spaces
When the specified address space overlaps with the on-chip memory area, the
The BEXCSL and BEXCSH registers specify the data bus width and number of wait
256
○
○
On-chip I/O > On-chip memory > CS0 space > CS1 space > CS2 space > CS3 space
512
Table 3.8.3 Valid Block Sizes for Each CS Space
○
○
32 K
○
○
○
64 K
○
○
○
○
92CF26A-188
128 K 256 K 512 K
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
1 M
Δ
Δ
Δ
Δ
CSEX
space) is accessed. These
2 M
Δ
Δ
Δ
Δ
4 M
Δ
Δ
Δ
TMP92CF26A
2007-11-21
8 M
Δ
Δ
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