TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 202

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

BROMCR
(016CH)
Bit Symbol
Read/Write
Reset State
Function
(4) Bypassing boot ROM
Note: Reset states differ depending on start modes.
even after completing the boot sequence in BOOT mode. In this case, the external memory
area from 3FE000H to 3FFFFFH can not be accessed because the boot ROM already
resides in the same area.
BROMCR<ROMLESS> bit to 1.
to 1 in other start modes.
To avoid such a situation, the on-chip boot ROM can be bypassed by setting the
This BROMCR<ROMLESS> bit is initialized to 0 in BOOT mode, while it is initialized
If this bit has been set to 1, writing a 0 to this bit is ignored.
The application system program may continue to run without asserting a reset signal
7
6
92CF26A-201
5
4
3
Nand_Flash
area
CS output
0: Enable
1: Disable
CSDIS
2
1
Boot ROM
0: Disable
1: Enable
ROMLESS
0/1 (note)
R/W
1
TMP92CF26A
2007-11-21
Vector
address
conversion
0: Disable
1: Enable
1/0 (note)
VACE
0