TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 449

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

it clears relevant bit of DATASET.
If transmitting finish normally,
DATASET = 1
Wait transmitting
rest data
DATASET = 0
Wait transmission event
Figure 3.16.16 Transmitting Sequence in Single Packet Mode
Transmitting number > payload
• WR of payload to relevant endpoint
• Total = Total − payload
Below is the transmitting sequence in single packet mode.
payload, relevant bit of DATASET
If transmitting number reach to
register is set 1
DATASET register
• Check bit of EPx_DSET_A
Wait IN token
92CF26A-448
Wait transmitting
transmitting
transmitting
Distinction
IDLE
Finish
EOP register
Transmitting number < payload
• WR of transmitting number relevant endpoint
• Total = 0
WR 0 to only bit of relevant endpoint
Transmission event
• Must access to EOP register in transmitting
• This is used showing to the closing control
short packet.
transfer type.
If you access to endpoint 0, you must to
access in closing control transfer type.
TMP92CF26A
2007-11-21