TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 451

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

Interrupt by EPx_EMPTY_A (B)
Check DATASET register
If transmitting finish normally,
DATASET = 1
It clears relevant
bit of DATASET.
transmitting
rest data
Wait
DATASET = 0
Figure 3.16.18 Transmitting Sequence in Dual Packet Mode
Wait transmitting event
Below is the Transmitting Sequence in Dual Packet Mode.
Transmitting number > payload × 2
• Write number of payload × 2 in
• Total = Total − payload × 2
If transmitting number reach to
payload, DATASET set 1 to
relevant bit of register
relevant endpoint
DATASETregister
• Check bit of EPx_DSET_A
• Check bit of EPx_DSET_B
Wait IN token
92CF26A-450
data distinction
Wait transmitting
Transmittind
transmitting
IDLE
Finish
Transmitting number < payload × 2
EOP register
• Write number of transmitting
• Total = 0
endpoint
Write 0 to only bit of relevant
Transmitting event
number
• Accessing to EOP register is needed in
• Control transfer type is only single mode
transmitting short packet
TMP92CF26A
2007-11-21