TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 186

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

MSAR0
(0143H)
MSAR2
(014BH)
Figure 3.8.2 Relationship Between Start Addresses and the Memory Start Address Register Values
3.8.3 Basic Functions and Register Settings
range for each address space, associating memory to the selected space and setting the number
of wait states to be inserted.
MSAR1
(0147H) Read/Write
MSAR3
(014FH) Function
(1) Programming chip select spaces
This section describes some of the memory controller functions, such as setting the address
FFFFFFH
000000H
Address
(a) Memory Start Address registers
MAMR3.
Bit Symbol
Reset State
The address ranges of CS0 to CS3 are specified by MSAR0 to MSAR3 and MAMR0 to
specify the start addresses for the CS0 to CS3 spaces. The bits S23 to S16 specify the
upper 8 bits (A23 to A16) of the start address. The lower 16 bits of the start address
(A15 to A0) are assumed to be 0. Accordingly, the start address can only be a multiple of
64 Kbytes, ranging from 000000H to FF0000H. Figure 3.8.2 shows the relationship
between the start addresses and the Memory Start Address register values.
Figure 3.8.1 shows the Memory Start Address registers. The MSAR0 to MSAR3
Memory Start Address Registers (for CS0 to CS3 spaces)
64KByte
Figure 3.8.1 Memory Start Address Register
S23
7
1
Start Address
S22
6
1
92CF26A-185
000000H .................... 00H
010000H .................... 01H
020000H .................... 02H
030000H .................... 03H
040000H .................... 04H
050000H .................... 05H
060000H .................... 06H
FF0000H .................... FFH
to
Determines A23 to A16 of the start address
S21
5
1
Value in the Memory Start Address register
S20
4
1
(MSAR0 to MSAR3)
to
R/W
Specifies start addresses for CS0 to CS3 spaces
S19
3
1
S18
2
1
S17
TMP92CF26A
1
1
2007-11-21
S16
0
1