TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 667

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

AC measuring condition
No.
4.3.2
1 System clock period ( = T)
2 A0, A1
3 A2 ~ A23
4
5 A0 ~ A23 Invalid → D0 ~ D15 hold
6
D0~D15
A0~A23
SDCLK
RD
RD
CS
RD
Note: The (a), (b) and (c) of “Symbol” in above table depend on the falling timing of RD pin. The falling timing of RD
falling
rising
2
Page ROM Read Cycle
(1) 3-2-2-2 mode
pin is set by MEMCR0<RDTMG1:0> in memory controller. If MEMCR0<RDTMG1:0> is set to “00”, it correspond
with (a) in above table, and “01” is (b), “10” is (c).
Parameter
Page Mode Access Timing (when using a 8-byte page size example)
t
CYC
→ D0 ~ D15 input
→ D0 ~ D15 input
→ D0 ~ D15 input
→ D0 ~ D15 hold
t
AD3
t
RD3
+ 0
Data
input
Symbol
t
t
t
t
t
CYC
AD2
AD3
RD3
t
HR
HA
92CF26A-666
t
t
HA
AD2
+ 1
Min
12.5
0
0
Data
input
Variable
2.0T − 18
3.0T − 18
2.5T − 18
266.6
t
Max
t
HA
AD2
+ 2
Data
input
80 MHz 60 MHz Unit
12.5
19.5
13
7
0
0
t
t
HA
AD2
16.6
15.2
31.8
+ 3
24
0
0
Data
input
TMP92CF26A
ns
t
t
HA
HR
2007-11-21