TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 513

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

(4) FIFO buffer and data format
Write Data Size
data written to the 4 bytes (32 bits) of the I2SnBUF register is written to this FIFO
buffer. This FIFO must be written in units of 4 bytes. It is also necessary to consider
the output order and to distinguish between right data and left data.
1-byte load instruction is used, invalid data will be transmitted. In case of using 1-byte
or 2-byte transmission instruction, FIFO buffer isn't renewed and transmission isn't
started.
1-byte access
2-byte access
4-byte access
The I
To write data to the I2SnBUF register, be sure to use a 4-byte load instruction. If a
And window addresses are 1800H (channel 0) and 1810H (channel1).
sequence:
normal timing.
contains no valid data. If there is even one byte of valid data in the FIFO, the flag is
cleared to “0”. (The <TEMPn> flag is set to “1” as soon as the last valid data in the
FIFO is sent to the transmission shift register.)
Also note that data must be written in units of 64 bytes using the following
4-byte load instruction × 16 times = 64-byte data write
If data is not written in units of 64 bytes, interrupts cannot be generated at the
The I2SnCTL<TEMPn> flag is set to “1” when the FIFO buffer for each channel
2
S unit is provided with a 128-byte FIFO buffer (32-bit wide × 32-entry). The
Example instruction
ld (0x1800),xwa
ld (0x1800),wa
ld (0x1800),a
92CF26A-512
8-bit width
Not allowed
Not allowed
OK
16-bit width
TMP92CF26A
Not allowed
Not allowed
2007-11-21
OK