TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 641

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TMP92CF26AXBG

Manufacturer Part Number
TMP92CF26AXBG
Description
Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
Manufacturer
Toshiba
Datasheet

Specifications of TMP92CF26AXBG

Processor Series
TLCS-900
Core
900/H
Data Bus Width
16 bit
Program Memory Type
ROM
Program Memory Size
8 KB
Data Ram Size
144 KB
Interface Type
I2C, I2S, UART, USB
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
136
Number Of Timers
10
Maximum Operating Temperature
+ 50 C
Mounting Style
SMD/SMT
Package / Case
FBGA-228
Development Tools By Supplier
BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMP92CF26AXBG
Manufacturer:
TOSHIBA
Quantity:
4 000
Part Number:
TMP92CF26AXBG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
supplied to all the blocks in the TMP92CF26A.
on-chip circuit blocks excluding the CPU, part of on-chip RAM, AD converter and RTC. This
leads to a reduction of the leakage current. In the Power Cut mode, power is supplied only to the
followings: I/O (including the AD pins), TSI circuit, 16 Kbytes of on-chip RAM, low-frequency
oscillation circuit, RTC and PMC.
TMP92CF26A
Figure 3.25.2 shows the examples of the PMC application circuit.
In normal mode, the power management pin (PWE) goes high, which allows the power to be
In the Power Cut mode, the PWE pin goes low, which allows the power to be removed from the
ADC
AVSS
AVCC
Figure 3.25.2 Application Circuit Examples of the PMC
DVCC-1C
DVSS-1C
Other Logic
High_OSC
SW en
CPU
DVCC-1A
SW en
DVSS-COM
92CF26A-640
LOW_OSC
XT1
RAM16kB
DVCC-1B DVCC-3A, 3B
Regulator
PMC
RTC
1.5 V
XT2
Regulator
SW en
3.3 V
I/O
Delay Circuit
Power management
signal (PWE)
RESET
External interrupts
INT0-INT7
(INT4 can be programmed as
TSI.)
INTKEY
S 1
0
Reset Circuit
Power-On
TMP92CF26A
2007-11-21
Main
Power

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