TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 129

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

3.7.6
output latches of P80 to P81, P83 to P87 to “1”. But if it is started at boot mode (AM [1:0]=
“11”), output latch of P82 is set to “1”.
register P8FC.
functions.
Port 8 (P80 to P87)
Ports 80 to 87 are 8-bit output ports. Resetting sets the output latch of P82 to “0” and the
Port 8 can also be set to function as an interface-pin for external memory using function
Writing “1” in the corresponding bit of P8FC and P8FC2 enables the respective
Resetting P8FC to “0” and P8FC2 to “0”, sets all bits to output ports.
Reset
Output latch
P8FC write
P8FC2 write
Function
Function
control2
P8 write
control
P8 read
CS ,
Figure 3.7.12 Port 8
“1”, SDCS , CSZA , CSXA ,“1”, “1”, “1”, “1”
0
CS
92CF26A-128
CS ,
0
Selector
1
,
SDCS
CS ,
S
2
,
CS , CSZB , CSZC , CSZD , CSXB
SDCS
3
,
CSXA
,
CSZB
,
CSZC
P80 (
P81 (
P82 (
P83 (
P84 ( CSZB )
P85 ( CSZC )
P86 ( CSZD ,
P87 ( CSXB ,
,
CS )
CS , SDCS )
CS , CSZA , SDCS )
CS , CSXA )
ND
1
0
2
3
0
CE
ND
ND
,
ND
0
1
CE
CE
1
CE
)
)
TMP92CF26A
2007-11-21