TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 363

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

SCL
SDA
<PIN>
INTSBI
interrupt request
Figure 3.15.15 Example in which <BC2:0> = “000” and <ACK> = “1” in transmitter mode
(3) 1-word Data Transfer
Output from master
Output from slave
completed, and determine whether the mode is a master or slave.
INTSBI interrupt
if MST = 0
Then shift to the process when slave mode
if TRX = 0
Then shift to the process when receiver mode.
if LRB = 0
Then shift to the process that generates stop condition.
Check the <MST> by the INTSBI interrupt process after the 1-word data transfer is
When the <TRX> = “1” (Transmitter mode)
SBICR1
SBIDBR
End of interrupt
Note: X: Don’t care
Write to SBIDBR
D7
Implement the process to generate a stop condition (Refer to 3.15.6 (4)) and
terminate data transfer.
When the <LRB> is “0”, the receiver is requests new data. When the next
transmitted data is 8 bits, write the transmitted data to SBIDBR. When the next
transmitted data is other than 8 bits, set the <BC2:0> <ACK> and write the
transmitted data to SBIDBR. After written the data, <PIN> becomes “1”, a serial
clock pulse is generated for transferring a new 1-word of data from the SCL pin,
and then the 1-word data is transmitted. After the data is transmitted, an INTSBI
interrupt request occurs. The <PIN> becomes “0” and the SCL line is pulled down
to the Low-level. If the data to be transferred is more than one word in length,
repeat the procedure from the <LRB> checking above.
a.
1
Check the <TRX> and determine whether the mode is a transmitter or receiver.
Check the <LRB>. When <LRB> is “1”, a receiver does not request data.
If <MST> = “1” (Master Mode)
D6
← X X X X X X X X
← X X X X X X X X
2
7 6 5 4 3 2 1 0
D5
3
92CF26A-362
D4
4
D3
5
Set the bit number of transmit and ACK.
Write the transmit data.
D2
6
D1
7
D0
8
ACK
9
Acknowledge
signal from a
receiver
TMP92CF26A
2007-11-21