TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 728

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

Symbol
SPIMD
SPICT
SPIST
SPIIE
(9)
SPI Mode
Setting
register
SPI
Control
register
SPI
Status
register
SPI
Interrupt
enable
register
SPIC (1/2)
Name
Address
(Prohibit
(Prohibit
082CH
082DH
0820H
RMW)
0821H
RMW)
0822H
0823H
0824H
0825H
Software
reset
0: don’t care
1: Reset
LOOPBACK
LOOPBACK
Test mode
0:disbale
1:enable
Communicat
-ion control
0: disable
1: enable
CRC select
0: CRC7
1: CRC16
CRC16_7_B CRCRX_TX_B CRCRESET_B
SWRST
CEN
W
7
0
0
0
0
Start bit for
Transmit /
0:LSB
1:MSB
0: output “0”
1: output “1”
CRC data
0: Transmit
1: receive
SYSCK
0: disable
1: enable
SPCS
MSB1ST
Receive
SPCS_B
XEN
R/W
R/W
R/W
6
0
1
1
0
pin
92CF26A-727
SPDO pin
state
(no transmit)
0:fixed to ”0”
1:fixed to ”1”
CRC
calculate
register
0:Reset
1:Release
Data length
0: 8bit
1: 16bit
DOSTAT
Reset
UNIT16
5
1
0
0
Transmit
mode
0: UNIT
1:Sequential
TXMOD
4
0
R/W
Synchronous
clock edge
during
transmitting
0: fall
1: rise
Transmit
control
0: disable
1: enable
Transmit
Status
0: no space
1: having
TEMP
interrupt
0:enable
1:disable
space
FIFO
TEMPIE
TCPOL
TEMP
TXE
3
0
R
0
1
0
Alignment in
Full duplex
0: disable
1: enable
RFUL
interrupt
0:enable
1:disable
Synchronou
s clock edge
during
receiving
0: fall
1: rise
Select Baud Rate
000:Reserved
001: f
010: f
011: f
CLKSEL2 CLKSEL1 CLKSEL0
RFULIE
RCPOL
FDPXE
2
1
0
0
0
SYS
SYS
SYS
/2
/3
/4
R/W
R/W
Invert data
During
transmitting
0: disable
1: enable
Receive
Mode
0: UNIT
1:Sequential
Transmit
Status
0: during
1: finish
TEND
interrupt
0:enable
1:disable
RXMOD
transmissio
-n or having
transmissio
-n data
TENDIE
TDINV
101: f
110: f
TEND
100: f
111: f
R/W
TMP92CF26A
1
0
0
0
1
0
SYS
SYS
SYS
SYS
2007-11-21
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R
Invert data
During
receiving
0: disable
1: enable
Receive
control
0: disable
1: enable
Receive
Status
0: during
1: finish or
REND
interrupt
0:enable
1:disable
receiving or
not having
receiving
data
not having
space
RENDIE
RDINV
REND
RXE
0
0
0
0
0
0