TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 238

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TMP92CF26AXBG

Manufacturer Part Number
TMP92CF26AXBG
Description
Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
Manufacturer
Toshiba
Datasheet

Specifications of TMP92CF26AXBG

Processor Series
TLCS-900
Core
900/H
Data Bus Width
16 bit
Program Memory Type
ROM
Program Memory Size
8 KB
Data Ram Size
144 KB
Interface Type
I2C, I2S, UART, USB
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
136
Number Of Timers
10
Maximum Operating Temperature
+ 50 C
Mounting Style
SMD/SMT
Package / Case
FBGA-228
Development Tools By Supplier
BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / Rohs Status
 Details

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SDLUDQM
SDLLDQM
(7) SDRAM initialization sequence
SDCKE
SDCLK
SDRAS
SDCAS
A15-A0
SDWE
SDCS
SDRAM.
commands are issued, the CPU operation (instruction fetch, execution) is halted. Before
executing the initialization sequence, appropriate port settings must be made to enable the
SDRAM control signals and address signals (A0 to A15).
to “000”.
A10
After reset release, the following sequence of commands can be executed to initialize the
The above commands are issued by setting SDCMM<SCMM2:0> to “001”. While these
After the initialization sequence is completed, SDCMM<SCMM2:0> is automatically cleared
Precharge All command
Eight Auto Refresh commands
Mode Register Set command
Precharge All
627
Auto Refresh
Figure3.10.9 Initialization Sequence Timing
Auto Refresh
92CF26A-237
227
Auto Refresh
Eight Auto Refresh commands
Auto Refresh
Auto Refresh
TMP92CF26A
2007-11-21
Mode Register
Set

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