TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 188

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

MSAR0
MSMR0
S23 S22 S21 S20 S19 S18 S17 S16
0
0
0
0
0
0
(c) Setting the start addresses and address ranges
(d) Programming block sizes
0
0
Example: Defining 128 Kbyte area as the CS0 space:
a. Valid start addresses
b. Invalid start addresses
0
0
0
CS0 space:
start address. Then, calculate the difference between the start address and the
anticipated end address (01FFFFH) based on the size of the CS0 space. Bits 20 to 8 of
the calculation result correspond to the mask value to be set for the CS0 space. Setting
this value in the MAMR0<V20:V8> bits specifies the block size. This example sets 07H
in MAMR0 to allocate a 64-Kbyte address space for the CS0 space.
symbol indicates the size that might not be programmable depending on the
combination of the values of the Memory Start Address and Memory Address Mask
registers. When specifying a block size indicated as “Δ”, set the start address register
to a multiple of the desired block size starting from 000000H.
settings for the CS space with the smallest number overrides the settings for other
spaces because of its highest priority.
V20 V19 V18 V17 V16 V15
000000H
020000H
040000H
060000H
000000H
010000H
030000H
050000H
0
0
0
An example of specifying a 64-Kbyte address space starting from 010000H for the
Set 01H in the MSAR0<S23:S16> bits that corresponds to the upper 8 bits of the
Table 3.8.3 shows the relationship between CS spaces and their block sizes. The “Δ”
If the 16-Mbyte range is defined as CS2 space, or if two or more spaces overlap, the
0
0
0
:
0
0
0
0
1
1
0
0
0
1
1
0
128 Kbytes
128 Kbytes
128 Kbytes
64 Kbytes
128 Kbytes
128 Kbytes
1
0
1
Setting of 07H specifies a 64-Jbyte area.
1
0
1
F
0
1
0
1
V14 ∼ V9
1
0
1
7
92CF26A-187
1
0
1
The desired block size can be programmed with this
configuration.
This start address is not a multiple of the desired block size.
Hence, the desired block size cannot be programmed with this
configuration.
1
1
0
F
0
1
0
1
V8
1
0
1
H
1
0
1
1
0
1
F
0
1
0
1
1
0
1
1
0
1
1
0
1
0
F
1
1
0
1
0
1
H
H
Memory
end
address
Memory
Start
address
Memory address
mask register
setting
TMP92CF26A
2007-11-21
CS0 area
Size
(64
Kbytes)