TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 501

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

SPIRD0
(834H)
(835H)
SPIRD1
(836H)
(837H)
*1: Address 834 = Valid data, address 835 = Invalid data,
*2: Address 834 = Valid data, address 835 = Invalid data, address 836 = Invalid data, address 837 = Invalid data
*3: Address 834 = Valid data, address 835 = Valid data, address 836 = Invalid data, address 837 = Invalid data
Bit Symbol
Read/Write
Reset State
Function
Bit Symbol
Read/Write
Reset State
Function
Bit Symbol
Read/Write
Reset State
Function
Bit Symbol
Read/Write
Reset State
Function
Receive Data
1-byte read
2-byte read
4-byte read
Read Size
○: Only the valid data are read when the CPU is reading.
♦ : Valid data + invalid data are read when the CPU is reading. Invalid data must be deleted later.
• : Only the invalid data are read when the CPU is reading.
REND bit before starting a read operation.
operations that are performed by using four-byte instructions, such as the parallel
operation of the SPI and DMA.
(There are some exceptions.)
For mode details, please refer to the following table.
(6) SPI Receive Data Register (SPIRD)
The SPIRD0 and SPIRD1 registers are used for reading the received data.
This register is used for reading the received data. Please check the state of the RFUL or
Since the receive data registers can contain data of up to four bytes, it can support read
When reading the data, the receive data at the address 834 should be the first to be read.
There are several restrictions of the data reading methods (i.e., instructions to be used).
RXD15
RXD15
RXD7
RXD7
15
15
7
7
0
0
0
0
ld a,(0x834)
ld a,(0x835)
ld wa,(0x834)
ld xwa,(0x834)
Instruction
Example
RXD14
RXD14
RXD6
RXD6
14
14
6
6
0
0
0
0
Figure 3.17.13 SPIRD Register
unit16 = 0
RXD13
RXD13
reception
RXD5
RXD5
1-byte
13
13
♦ *1
♦ *2
5
5
SPIRD0 Register
0
0
SPIRD1 Register
0
0
UNIT-mode Reception
○
•
92CF26A-500
(FIFO Disabled)
Receive data bits [15:8]
Receive data bits [15:8]
Receive data bits [7:0]
Receive data bits [7:0]
RXD12
RXD12
RXD4
RXD4
12
12
4
4
2-byte reception
0
0
0
0
unit16 = 1
R
R
♦ *3
R
R
○
○
○
RXD11
RXD11
RXD3
RXD3
11
11
3
3
0
0
0
0
Sequential-mode Reception
unit16 = 0
Prohibited
Prohibited
RXD10
reception
RXD10
RXD2
RXD2
1-byte
10
10
2
2
0
0
0
0
○
○
(FIFO Enabled)
RXD1
RXD9
RXD1
RXD9
1
9
1
9
0
0
0
0
Prohibited
Prohibited
unit16 = 1
reception
2-byte
○
○
TMP92CF26A
RXD0
RXD8
RXD0
RXD8
0
8
2007-11-21
0
0
0
8
0
0