TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 126

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TMP92CF26AXBG

Manufacturer Part Number
TMP92CF26AXBG
Description
Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
Manufacturer
Toshiba
Datasheet

Specifications of TMP92CF26AXBG

Processor Series
TLCS-900
Core
900/H
Data Bus Width
16 bit
Program Memory Type
ROM
Program Memory Size
8 KB
Data Ram Size
144 KB
Interface Type
I2C, I2S, UART, USB
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
136
Number Of Timers
10
Maximum Operating Temperature
+ 50 C
Mounting Style
SMD/SMT
Package / Case
FBGA-228
Development Tools By Supplier
BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / Rohs Status
 Details

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TOSHIBA
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Port read data
Port read data
NDRE
WRLL
3.7.5
,
,
NDWE
WRLU
individually set as either inputs or outputs by control register P7CR and function register
P7FC.
function as interface-pins for external memory.
to the following function pins:
Port 7 (P70 to P76)
Port7 is a 7-bit general-purpose I/O port (P70 is used for output only). Bits can be
In addition to functioning as a general-purpose I/O port, P70 to P76 pins can also
A reset initializes P70 pin to output port mode, and P71 to P76 pins to input port mode.
Setting the AM1 and AM0 pins as shown below and resetting the device initialize port 7
RD
AM1
0
0
1
1
P7CR register
P7FC register
P7FC register
P7 register
P7 register
AM0
0
1
0
1
Selector
0
1
Function Setting after reset is released
Initial setting of P70 pin
S
Figure 3.7.9 Port7
92CF26A-125
Selector
S 1
Don’t use this setting
Don’t use this setting
0
Output port (P70)
Selector
0
1
S
Selector
RD pin
0
1
S
TMP92CF26A
2007-11-21
P71 (
P72 (
P70 (
WRLU
WRLL
RD
)
,
,
NDWE
NDRE
)
)

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