TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 394
TMP92CF26AXBG
Manufacturer Part Number
TMP92CF26AXBG
Description
Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
Manufacturer
Toshiba
Datasheet
1.TMP92CF26AXBG.pdf
(767 pages)
Specifications of TMP92CF26AXBG
Processor Series
TLCS-900
Core
900/H
Data Bus Width
16 bit
Program Memory Type
ROM
Program Memory Size
8 KB
Data Ram Size
144 KB
Interface Type
I2C, I2S, UART, USB
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
136
Number Of Timers
10
Maximum Operating Temperature
+ 50 C
Mounting Style
SMD/SMT
Package / Case
FBGA-228
Development Tools By Supplier
BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
TMP92CF26AXBG
Manufacturer:
TOSHIBA
Quantity:
4 000
Part Number:
TMP92CF26AXBG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
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Note1: In receive mode, if the endpoint bits corresponding to packet-A or paclet-B are “1”, read the required
Note2: In transmit mode, if both A and B bits are not “1”, this means there is space in FIFO. So, write data of payload
Note3: In dual packet transmit mode, if both A and B packet are empty and EOP<EPn_EOPB> is written “0”, the
packet-number data after checking DATASIZE<PACKET_ACTIVE>.
or less to FIFO. If the transmission is short-packet, write “0” to EOP<EPn_EOPB> after writing data to the FIFO.
The maximum size that can be written to A or B packet is the same as the maximum payload size. If both A and
B bits are “0”, continuous writing of double maximum payload size is available.
NULL-data is set to FIFO. In single mode, the NULL-data is also set to FIFO if the above operation is executed
when packet-A contains no data.
92CF26A-393
TMP92CF26A
2007-11-21
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