TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 628

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

Table 3.23.2 Correspondence between analog input channels and AD conversion result registers
3.23.2.8 Storing and Read of AD Conversion Results
3.23.2.9 Data Polling
Note: In order to detect overruns without omission, read the conversion result storage register's higher-order bits first,
Analog input channel
and than read the lower-order bits next. As this result, receiving the result of OVRn = "0" and ADRnRF = "1" for
overruns existing in the lower-order bits means that a correct conversion result has been obtained.
higher-order/lower-order registers (ADREG0H/L∼ ADRG5H/L) for the normal AD
conversion (ADREG0H/L to ADREG5H/L are read-only registers)
ADREG0H/L to ADREG3H/L one after another. In other modes, the conversion results
of channels AN0, AN1, AN2, AN3, AN4, and AN5 are each stored into ADREG0H/L,
ADREG1H/L, ADREG2H/L, ADREG3H/L, ADREG4H/L, and ADREG5H/L.
conversion result registers.
perform a polling on ADMOD0<EOS>. After confirming that ADMOD0<EOS> is set to
“1,” read the AD conversion storage register.
AD
In the channel-fix repeat conversion mode, AD conversion results are stored into
Table 3.23.2 shows the correspondence between analog input channels and AD
To process AD conversion results by using data polling without using interrupts,
(Port G)
AN0
AN1
AN2
AN3
AN4
AN5
conversion
modes than shown in
results
Other conversion
92CF26A-627
ADREG0H/L
ADREG1H/L
ADREG2H/L
ADREG3H/L
ADREG4H/L
ADREG5H/L
the right
AD Conversion result registers
are
stored
Channel-fix repeat
conversion mode
in
(per 4 times)
ADREG0H/L
ADREG1H/L
ADREG2H/L
ADREG3H/L
the
AD
conversion
TMP92CF26A
2007-11-21
result