TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 402

• Manufacturer Part Number: TMP92CF26AXBG
• Description: Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
• Manufacturer: Toshiba

Specifications of TMP92CF26AXBG

• Processor Series: TLCS-900
• Core: 900/H
• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Program Memory Size: 8 KB
• Data Ram Size: 144 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 10
• Maximum Operating Temperature: + 50 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-228
• Development Tools By Supplier: BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / Rohs Status: Details

FRAME_L
(07E1H)
FRAME_H
(07E2H)
ADDRESS
(07E3H)
bit Symbol
Read/Write
Reset State
bit Symbol
Read/Write
Reset State
bit Symbol
Read/Write
Reset State
3.16.3.15 FRAME Register
3.16.3.16 ADDRESS Register
T[10:7] (H register: Bit7 to bit4)
T[6:0] (L register: Bit6 to bit0)
ADDRESS [6:0] (Bit6 to bit0)
CREATE (H register: Bit2)
FRAME STS[1:0]
(H register: Bit1 and bit0)
0: DISABLE
1: ENABLE
0: BEFORE
1: VALID
2: LOST
and is used for Isochronous transfer type.
enumeration.
This register shows the frame number which is issued with SOF token from the host
Each HIGH and LOW register shows upper and lower bits.
This register shows the device address which is specified by the host in bus
By reading this register, the present address can be confirmed.
T[10]
7
R
7
R
−
0
0
7
T[6]
T[9]
6
R
R
0
6
0
A6
6
R
0
ID, and UDC judges whether it is an effective transaction or
not.
T[5]
92CF26A-401
T[8]
The UDC compares this registers and address in all packet
This is initialized to “00H” by USB reset.
5
R
A5
0
5
R
0
5
R
0
They also shows the frame-number.
that is shown in the FRAME register is correct or not. At
the LOST status, a correct frame number is undefined.
the FRAME register is correct.
generation, BEFORE condition shows it from USB host
controller inside that from SOF generation time to
reception of SOF token. Correct frame-number value is
the value that is selected from FRAME register value.
SOF automatically from the UDC is enabled or not. This
is used in case of error in receiving SOF token.
These bits are renewed when SOF-token is received.
This function is set by accessing COMMAND register.
On reset, this bit is initialized to “0”.
These bits show the status whether a frame number
If this register is “VALID”, the number that is shown to
If this register is “BEFORE”, during SOF auto
These bits show whether the function that generates
T[4]
T[7]
A4
4
R
4
R
4
R
0
0
0
T[3]
A3
3
R
3
3
R
0
0
CREATE
T[2]
A2
2
R
2
R
2
R
0
0
0
FRAME_STS1 FRAME_STS0
T[1]
A1
1
R
1
R
0
1
TMP92CF26A
1
R
0
2007-11-21
T[0]
R
R
0
0
0
0
A0
0
R
0