TMP92CF26AXBG Toshiba, TMP92CF26AXBG Datasheet - Page 503

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TMP92CF26AXBG

Manufacturer Part Number
TMP92CF26AXBG
Description
Microcontrollers (MCU) TLCS-900/H1 ROMLESS 144KB RAM
Manufacturer
Toshiba
Datasheet

Specifications of TMP92CF26AXBG

Processor Series
TLCS-900
Core
900/H
Data Bus Width
16 bit
Program Memory Type
ROM
Program Memory Size
8 KB
Data Ram Size
144 KB
Interface Type
I2C, I2S, UART, USB
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
136
Number Of Timers
10
Maximum Operating Temperature
+ 50 C
Mounting Style
SMD/SMT
Package / Case
FBGA-228
Development Tools By Supplier
BM1040R0A, BM1055R0B, SW96CN0-ZCC, SW00MN0-ZCC
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMP92CF26AXBG
Manufacturer:
TOSHIBA
Quantity:
4 000
Part Number:
TMP92CF26AXBG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
3.18 I
This function enables the TMP92CF26A to be used for digital audio systems by connecting an
LSI for audio output such as a DA converter.
2
S (Inter-IC Sound)
The TMP92CF26A incorporates serial output circuitry that is compliant with the I
The I
2
Number of Channels
Format
Pins used
WS frequency
Data transfer rate
Transmission buffer
Direction of data
Data length
Clock edge
Interrupt
S unit has the following features:
Item
Table 3.18.1 I
2 channels
I
Right-justified and left-justified formats supported
Stereo / monaural
Master transmission only
1. I2SnCKO (clock output)
2. I2SnDO (output)
3. I2SnWS (Word Select output)
Refer to “Setting the transfer clock generator and Word Select signal”.
64 bytes × 2
MSB-first or LSB-first selectable
8 bits or 16 bits
Rising edge or falling edge
INTI2Sn
(64-byte FIFO empty interrupt)
92CF26A-502
2
S-format compliant
2
S Operation Features
Description
TMP92CF26A
2007-11-21
2
S format.

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