HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 108

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

HFC-E1
3.4.3 FIFO Sequence Mode
In contrast to the PCM and E1 time slots, the FIFO data rate is not fixed to 8 kByte/s. In
the previous section the CSM allows the functional capability of a FIFO data rate less than
8 kByte/s. In this section, the third data flow mode shows how to use FIFOs with a higher
data rate with the FIFO Sequence Mode (FSM). In transmit direction one FIFO can cyclically
distribute its data to several HFC-channels. In opposite direction, received data from several
HFC-channels can be collected cyclically in one FIFO (see Fig. 3.8, right side). A one-to-
one connection between FIFO and HFC-channel is of course possible in FSM, too (Fig. 3.8,
left side).
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In addition to the above register settings, the subchannel processor must be configured
now. It is important to see that the subchannel processor programming has no influence
to the connection setup. So there is no need to describe these settings here. Please see
Section 3.5 on page 113 for a detailed subchannel description.
G
In Channel Select Mode
Rule
every HFC-channel used requires at least one enabled FIFO (except
for the PCM-to-PCM connection) with the same data direction and
every PCM time slot used requires one HFC-channel (except for the
PCM-to-PCM connection where a full duplex connection allocates
one HFC-channel).
A_CON_HDLC[12,TX] : V_DATA_FLOW
A_CHANNEL[12,TX] : V_CH_DIR0
A_CON_HDLC[11,TX] : V_DATA_FLOW
A_CHANNEL[11,TX] : V_CH_DIR0
A_CON_HDLC[11,RX] : V_DATA_FLOW
A_CHANNEL[11,RX] : V_CH_DIR0
A_CON_HDLC[12,RX] : V_DATA_FLOW
A_CHANNEL[12,RX] : V_CH_DIR0
R_FIFO
R_FIFO
R_FIFO
R_FIFO
: V_FIFO_DIR
: V_FIFO_NUM
: V_CH_NUM0
: V_FIFO_DIR
: V_FIFO_NUM
: V_CH_NUM0
: V_FIFO_DIR
: V_FIFO_NUM
: V_CH_NUM0
: V_FIFO_DIR
: V_FIFO_NUM
: V_CH_NUM0
Data Sheet
Data flow
0
’100’
0
0
’100’
0
12
20
11
20
1
11
’100’
1
1
12
’100’
1
20
20
(transmit FIFO)
(FIFO
(transmit HFC-channel)
(transmit FIFO)
(FIFO
(transmit HFC-channel)
(FIFO #12)
(HFC-channel #20)
(FIFO #11)
(HFC-channel #20)
(receive FIFO)
(FIFO
(receive HFC-channel)
(receive FIFO)
(FIFO
(receive HFC-channel)
(FIFO #11)
(HFC-channel #20)
(FIFO #12)
(HFC-channel #20)
E1)
E1)
E1)
E1)
March 2003 (rev. A)
Cologne
Chip