HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 231

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

March 2003 (rev. A)
HFC-E1
R_BRG_TIM_SEL01
Timing selection for bridge device connected to /BRG_CS0 and /BRG_CS1
Every selection uses a timing defined in R_BRG_TIM0 . . . R_BRG_TIM3.
1..0
3..2
5..4
7..6
R_BRG_TIM_SEL23
Timing selection for bridge device connected to /BRG_CS2 and /BRG_CS3
Every selection uses a timing defined in R_BRG_TIM0 . . . R_BRG_TIM3.
1..0
3..2
5..4
7..6
Bits
Bits
0
0
0
0
0
0
0
0
Value
Value
Reset
Reset
V_BRG_WR_SEL0
V_BRG_RD_SEL0
V_BRG_WR_SEL1
V_BRG_RD_SEL1
V_BRG_WR_SEL2
V_BRG_RD_SEL2
V_BRG_WR_SEL3
V_BRG_RD_SEL3
Name
Name
Auxiliary interface
(write only)
(write only)
Data Sheet
Description
WR-timing selection for the chip connected to
pin /BRG_CS0
RD-timing selection for the chip connected to
pin /BRG_CS0
WR-timing selection for the chip connected to
pin /BRG_CS1
RD-timing selection for the chip connected to
pin /BRG_CS1
Description
WR-timing selection for the chip connected to
pin /BRG_CS2
RD-timing selection for the chip connected to
pin /BRG_CS2
WR-timing selection for the chip connected to
pin /BRG_CS3
RD-timing selection for the chip connected to
pin /BRG_CS3
Cologne
Chip
231 of 272
0x4C
0x4D