HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 17

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HFC-S2M

Manufacturer Part Number
HFC-S2M
Description
Isdn HDLC Fifo Controller With Primary Rate Interface
Manufacturer
Cologne Chip AG
Datasheet
Read only registers:
March 2003 (rev. A)
HFC-E1
Address
0x0C
0x0C
0x0D
0x1C
0x2C
0x1A
0x1B
0x1F
0x3A
0x3B
0x04
0x04
0x04
0x05
0x06
0x06
0x07
0x10
0x11
0x14
0x15
0x16
0x17
0x18
0x19
0x20
0x24
0x25
0x26
0x27
0x30
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
0x39
0x40
0x41
0x44
0x45
0x46
Name
A_Z12
A_Z1L
A_Z1
A_Z1H
A_Z2L
A_Z2
A_Z2H
A_F1
A_F12
A_F2
R_IRQ_OVIEW
R_IRQ_MISC
R_CONF_OFLOW
R_RAM_USE
R_CHIP_ID
R_BERT_STA
R_F0_CNTL
R_F0_CNTH
R_BERT_ECL
R_BERT_ECH
R_STATUS
R_CHIP_RV
R_STATE
R_RX_STA0
R_RX_STA1
R_RX_STA2
R_RX_STA3
R_SLIP
R_FAS_ECL
R_FAS_ECH
R_VIO_ECL
R_VIO_ECH
R_CRC_ECL
R_CRC_ECH
R_E_ECL
R_E_ECH
R_SA6_SA13_ECL
R_SA6_SA13_ECH
R_SA6_SA23_ECL
R_SA6_SA23_ECH
R_GPIO_IN0
R_GPIO_IN1
R_GPI_IN0
R_GPI_IN1
R_GPI_IN2
group
Reset
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
0, 3
0, 3
0, 3
0, 3
0, 3
0, 3
0, 3
0, 3
0, 3
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
0, 3
0, 3
0, 3
0, 3
0, 3
0, 3
0, 3
0, 3
0, 3
H
Page
141
139
139
139
140
140
140
141
142
141
240
241
206
216
193
193
216
217
242
169
170
171
171
172
172
173
173
173
174
174
174
175
175
175
176
176
176
259
260
261
262
263
Data Sheet
90
91
91
Read / Write registers:
Note: See table 12.4 on page 235 for ‘Reset group’
explanation.
Address
Address
0xCC
0xCD
0xCA
0xCB
0xCE
0xCF
0xC8
0xC9
0xC0
0x47
0x88
0x80
0x80
0x80
0x84
0x84
0x84
R_GPI_IN3
R_INT_DATA
A_FIFO_DATA2
A_FIFO_DATA0
A_FIFO_DATA1
A_FIFO_DATA2_NOINC –
A_FIFO_DATA0_NOINC –
A_FIFO_DATA1_NOINC –
Name
R_IRQ_FIFO_BL0
R_IRQ_FIFO_BL1
R_IRQ_FIFO_BL2
R_IRQ_FIFO_BL3
R_IRQ_FIFO_BL4
R_IRQ_FIFO_BL5
R_IRQ_FIFO_BL6
R_IRQ_FIFO_BL7
Name
R_RAM_DATA
group
group
Reset
Reset
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
Cologne
Chip
17 of 272
Page
Page
264
142
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244
245
246
247
248
249
250
144
143
143
145
144
145
90

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