HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 144

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

HFC-E1
(This register can be used to store the last FIFO byte in transparent transmit mode. Then this
byte is repeately transmitted automatically.)
144 of 272
A_FIFO_DATA2 [FIFO]
FIFO data register
Before writing or reading this array register the FIFO must be selected by the
register R_FIFO.
31..0
A_FIFO_DATA0_NOINC [FIFO] (read / write)
FIFO data register
This address can also be accessed with word and double word width to access two or four
data bytes (see registers A_FIFO_DATA1_NOINC and A_FIFO_DATA2_NOINC).
Before writing or reading this array register the FIFO must be selected by the
register R_FIFO.
7..0
Bits
Bits
0
0
Reset
Value
Reset
Value
Name
V_FIFO_DATA2
Name
V_FIFO_DATA0_NOINC
FIFO handling and HDLC controller
(read / write)
Data Sheet
Data double word
Data byte
Description
Read / write two words from / to the FIFO selected
in the R_FIFO register and increment -counter
by 4.
Description
Read access: Read one byte from the FIFO selected
in the R_FIFO register and increment -counter
by 1.
Write access: Write one byte to the FIFO selected
in the R_FIFO register without incrementing
-counter.
March 2003 (rev. A)
Cologne
Chip
0x80
0x84