HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 9

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

List of Figures
March 2003 (rev. A)
1.1
1.2
1.3
1.4
1.5
1.6
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10 Write access from 8 bit processors in mode 2 (Motorola) and mode 3 (Intel) . . . . .
2.11 Byte / word read access from 16 bit proc. in mode 2 (Motorola) & mode 3 (Intel) . .
2.12 Byte / word write access from 16 bit proc. in mode 2 (Motorola) & mode 3 (Intel) . .
2.13 Read access from 8 bit processors in mode 4 (Intel, multiplexed) . . . . . . . . . . .
2.14 Write access from 8 bit processors in mode 4 (Intel, multiplexed) . . . . . . . . . . .
2.15 Word read access from 16 bit processors in mode 4 (Intel, multiplexed) . . . . . . . .
2.16 Word write access from 16 bit processors in mode 4 (Intel, multiplexed) . . . . . . .
2.17 Double word read access from 32 bit processors in mode 4 (Intel, multiplexed). . . .
2.18 Write access from 32 bit processors in mode 4 (Intel, multiplexed) . . . . . . . . . .
2.19 8 bit Intel / Motorola processor circuitry example (mode 2) . . . . . . . . . . . . . .
2.20 16 bit Intel processor circuitry example (mode 4, multiplexed) . . . . . . . . . . . .
2.21 SPI read access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.22 SPI write access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.23 Interrupted SPI read access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.24 SPI connection circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
HFC-E1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
HFC-E1 pinout in PCI mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
HFC-E1 pinout in ISA PnP mode . . . . . . . . . . . . . . . . . . . . . . . . . . .
HFC-E1 pinout in PCMCIA mode . . . . . . . . . . . . . . . . . . . . . . . . . . .
HFC-E1 pinout in processor mode . . . . . . . . . . . . . . . . . . . . . . . . . . .
HFC-E1 pinout in SPI mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EEPROM connection circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EE_SCL/EN and EE_SDA connection without EEPROM . . . . . . . . . . . . . .
PCI configuration registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PCI access in PCI I/O mapped mode . . . . . . . . . . . . . . . . . . . . . . . . . .
PCI access in PCI memory mapped mode . . . . . . . . . . . . . . . . . . . . . . .
PCI connection circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ISA PnP circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PCMCIA circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Read access from 8 bit processors in mode 2 (Motorola) and mode 3 (Intel) . . . . .
Data Sheet
9 of 272
19
22
23
24
25
26
46
48
53
59
62
83
84
84
85
46
49
49
73
74
79
81
82
66
68
69
71
75
76
77